1. Field of the Invention
The present invention relates to electrostatic discharge (ESD) protection circuitry, and in particular, to ESD protection circuitry tolerant of high operating voltages and signals.
2. Description of the Related Art
As is well known, a recent trend in the design of products employing significant analog circuitry includes the combining of many if not all functional blocks of analog circuitry within a single integrated circuit (IC), or “chip”. Ideally, such an analog chip must be compatible with, or at least tolerant of, the voltage levels of the input and output signals, as well as the power supply for the system. Indeed, some chips must be able to provide a power supply for the output device (e.g., as is the case for many new universal serial bus, or “USB”, devices) or to charge batteries during a data exchange.
One example of such a new product environment is the rapidly growing market of automotive applications. As automobiles incorporate increasingly complex and sophisticated electronic systems, power requirements for such systems increase significantly. As a result, it is now anticipated that future automotive electrical systems will have nominal power supply voltages of at least 24 volts, and perhaps as much as 42 volts. As a result, the trend toward incorporating semiconductor technology in virtually every aspect of operation and control of the automobile necessitates that each IC be compatible with such higher power supply levels.
It has been demonstrated as possible to use conventional low voltage semiconductor processing techniques to produce chips capable of operating at the new higher power supply and signal voltages. However, providing ESD protection circuitry which is tolerant of the higher operating voltages, e.g., 40–60 volts, has been more problematic.